The embodiments described below involve the field of microprocessor identification in computer systems. Microprocessor-based computer systems have become incredibly prolific and are used at all levels of the public and private sector. With the vast increase of microprocessors in circulation, there sometimes arises the need to identify various details about the microprocessor within a system. Moreover, this identification process is preferably achieved electronically as opposed to some physical and/or external indication such as a bar code or printed label. For example, in the Intel x86 microprocessors, there is included an instruction at the instruction set architecture ("ISA") level known as CPUID. As known in the art, the CPUID instruction provides information to software including the vendor, family, model, and stepping of the microprocessor on which it is executing. This information may then be used by the software for purposes known in the art.
Other systems include certain electronic identification techniques. For example, some systems by IBM include a storage device separate from the microprocessor, where a system level identifier is stored in that separate storage device. This system, however, suffers various drawbacks. For instance, the identifier only identifies the system and not necessarily the specific microprocessor included within that system. In addition, because the identifier is in a storage device apart from the microprocessor, the identifier may fail its purpose if either the storage device or the microprocessor is replaced without updating the identifier in the storage device to reflect this changing event. As another example of current systems, some microprocessors include an identifier which is accessible via the JTAG scan. This approach, however, also suffers various drawbacks. For example, the JTAG scan is commonly a technique requiring access to a particular microprocessor port and with particularized equipment In addition, the JTAG scan may only be performed meaningfully given knowledge about the scan chain of the scanned registers. Still further, this technique is commonly only used at the development and manufacturing stage.
In view of the above, there arises a need to address the drawbacks of current systems.